A VLSI Chip for Ray Tracing Bicubic Patches

dc.contributor.author	Bouatouch, Kadi	en_US
dc.contributor.author	Saouter, Yannick	en_US
dc.contributor.author	Candela, Jean Charles	en_US
dc.date.accessioned	2015-10-05T07:56:07Z
dc.date.available	2015-10-05T07:56:07Z
dc.date.issued	1989	en_US
dc.identifier.issn	1017-4656	en_US
dc.identifier.uri	http://dx.doi.org/10.2312/egtp.19891008	en_US
dc.description.abstract	This paper deals with the integration of a VLSI chip dedicated to ray tracing bicubic patches. A recursive subdivision algorithm is embedded in this chip. The recursion stops when the termination conditions are met. A software implementation allowed for the determination of key parameters which influenced the choice of the proposed chip' architecture. Only some modules of the chip are, at the present time, simulated and laid out, the rest is being implemented. A detailed description of the chip' modules is given.	en_US
dc.publisher	Eurographics Association	en_US
dc.title	A VLSI Chip for Ray Tracing Bicubic Patches	en_US
dc.description.seriesinformation	EG 1989-Technical Papers	en_US
dc.identifier.doi	10.2312/egtp.19891008	en_US